1. Field of the Invention
The present invention relates generally to a dielectric isolation technique, and more particularly to a dielectrically isolated semiconductor substrate wherein two semiconductor wafers are bonded to each other with an insulating layer interposed therebetween, and to a method of manufacturing the same.
2. Description of the Related Art
There is conventionally known a direct bonding technique for bonding two semiconductor wafers thereby to attain dielectric isolation of a semiconductor device. According to this technique, as shown in FIG. 101, an insulating layer 103 is formed on the surface of a first insulating layer 101 and/or the surface of a second insulating layer 102. The insulating layer 103 is interposed and bonded between the first and second layers 1 and 2. After reducing the thickness of the second silicon wafer 2, a V-shaped groove 105 is formed in the second silicon wafer 102, and oxide layers 106 are formed on the side faces of the groove 105. Thus, a portion 102' the second silicon wafer 2 is dielectrically isolated, in an island shape, from the other part of the wafer 102.
In the structure shown in FIG. 1, when a CMOS device is used as a logic circuit, many CMOS logic circuits can be formed in a single island region. However, when a bipolar device is used as a logic circuit, it becomes necessary to isolate each logic circuit by means of the V-shaped groove. Consequently, the number of V-shaped grooves increases, and a large area is occupied by the grooves. Thus, the area for forming the devices is reduced. The structure shown in FIG. 1 is therefore unsuitable.
Also, when both a low breakdown voltage device (e.g. a bipolar device) and a high breakdown voltage device (e.g. a DMOS device) are formed in the dielectrically isolated semiconductor substrate shown in FIG. 1, the following problem occurs. Namely, in forming the DMOS device, the thickness of the substrate needs to be increased to a relatively high value in order to obtain a high breakdown voltage. On the other hand, in forming the bipolar device, it is necessary to decrease the thickness of the substrate in order to achieve a high speed operation. It is therefore difficult to attain the thickness of the substrate which is desirable both for the bipolar device and the DMOS device.